Hi Andrew,
I am having the same issue except that I am running version IC616 instead of IC615. The problem started after upgrading from IC515 to IC616, and MMSIM111 to MMSIM131. I backed up my old version before installing IC616 and MMSIM131. When I restore the old IC515 and MMSIM131 version, the simulation works fine. I am running on Opensuse 11. Here is the log, and my input.scs file. It looks like all the components are there. The error message makes no sense.
Bạn đang xem: ERROR (SPECTRE-4080): There are no components in the circuit.
Thanks,
Tracy
–
-Cadence (R) Virtuoso (R) Spectre (R) Circuit SimulatorVersion 13.1.0.210.isr6 64bit – 4 Apr 2014Copyright (C) 1989-2014 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, Virtuoso and Spectre are registered trademarks of Cadence Design Systems, Inc. All others are the property of their respective holders.Includes RSA BSAFE(R) Cryptographic or Security Protocol Software from RSA Security, Inc.User: twolf Host: stiserver1 HostID: 7F0200 PID: 16035Memory available: 1.6120 GB physical: 6.2630 GBCPU Type: Intel(R) Core(TM) i7 CPU 960 @ 3.20GHz Processor PhysicalID CoreID Frequency 0 0 0 1600.0 1 0 1 1600.0 2 0 2 1600.0 3 0 3 1600.0 4 0 0 1600.0 5 0 1 1600.0 6 0 2 1600.0 7 0 3 3201.0Simulating `input.scs’ on stiserver1 at 9:30:22 AM, Wed May 14, 2014 (process id: 16035).Current working directory: /home/STI_Designs/Adonis/ON2750_4M1T3/work_libs/twolf/cds/simulation/4x_diff_comp_block_test/spectre/schematic/netlistEnvironment variable: SPECTRE_DEFAULTS=-E +l %C:r.outCommand line: /home/Cadence/installs/MMSIM131/tools/spectre/bin/64bit/spectre input.scs +escchars +log ../psf/spectre.out +inter=mpsc +mpssession=spectre0_15660_1 -format psfxl -raw ../psf -I/home/STI_Designs/PDKs/TowerJazz/Fab2/TS18SL_4M1T3/HOTCODE/models/v4.6/spectre +lqtimeout 900 -maxw 5 -maxn 5spectre pid = 16035Loading /home/Cadence/installs/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libinfineon_sh.so …Loading /home/Cadence/installs/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libphilips_o_sh.so …Loading /home/Cadence/installs/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libphilips_sh.so …Loading /home/Cadence/installs/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libsparam_sh.so …Loading /home/Cadence/installs/MMSIM131/tools.lnx86/cmi/lib/64bit/5.0/libstmodels_sh.so …Reading file: /home/STI_Designs/Adonis/ON2750_4M1T3/work_libs/twolf/cds/simulation/4x_diff_comp_block_test/spectre/schematic/netlist/input.scsReading file: /home/Cadence/installs/MMSIM131/tools.lnx86/spectre/etc/configs/spectre.cfg/usr/lib64/gcc/x86_64-suse-linux/4.5/cc1: /home/Cadence/installs/MMSIM131/tools/lib/64bit/libstdc++.so.6: version `GLIBCXX_3.4.14′ not found (required by /usr/lib64/libppl_c.so.4)/usr/lib64/gcc/x86_64-suse-linux/4.5/cc1: /home/Cadence/installs/MMSIM131/tools/lib/64bit/libstdc++.so.6: version `GLIBCXX_3.4.14′ not found (required by /usr/lib64/libppl.so.9)Time for NDB Parsing: CPU = 51.993 ms, elapsed = 95.202 ms.Time accumulated: CPU = 73.988 ms, elapsed = 95.207 ms.Peak resident memory used = 34.5 Mbytes.Reading link: /home/Cadence/installs/MMSIM131/tools.lnx86/spectre/etc/ahdl/discipline.hReading file: /home/Cadence/installs/MMSIM131/tools.lnx86/spectre/etc/ahdl/disciplines.vamsReading link: /home/Cadence/installs/MMSIM131/tools.lnx86/spectre/etc/ahdl/constants.hReading file: /home/Cadence/installs/MMSIM131/tools.lnx86/spectre/etc/ahdl/constants.vamsTime for Elaboration: CPU = 19.997 ms, elapsed = 19.824 ms.Time accumulated: CPU = 93.985 ms, elapsed = 115.206 ms.Peak resident memory used = 38.9 Mbytes.Time for EDB Visiting: CPU = 0 s, elapsed = 56.0284 us.Time accumulated: CPU = 93.985 ms, elapsed = 115.407 ms.Peak resident memory used = 39 Mbytes.Error found by spectre during initial setup. ERROR (SPECTRE-4080): There are no components in the circuit.Aggregate audit (9:30:22 AM, Wed May 14, 2014):Time used: CPU = 94 ms, elapsed = 116 ms, util. = 81%.Time spent in licensing: elapsed = 51.7 ms, percentage of total = 44.6%.Peak memory used = 39 Mbytes.Simulation started at: 9:30:22 AM, Wed May 14, 2014, ended at: 9:30:22 AM, Wed May 14, 2014, with elapsed time (wall clock): 116 ms.spectre completes with 1 error, 0 warnings, and 0 notices.spectre terminated prematurely due to fatal error.-
// Generated for: spectre// Generated on: May 14 09:30:21 2014// Design library name: navy// Design cell name: 4x_diff_comp_block_test// Design view name: schematicsimulator lang=spectreglobal 0parameters wnsum wncore wnin wpsum wpin wpcoreinclude “global.scs” section=GLOBALinclude “fet.scs” section=NOMinclude “fethv.scs” section=NOMinclude “nat.scs” section=NOMinclude “bjt.scs” section=NOMinclude “accap.scs” section=NOMinclude “mimcap.scs” section=NOMinclude “mfc.scs” section=NOMinclude “res.scs” section=NOMinclude “diode.scs” section=NOM// Library name: navy// Cell name: 4x_diff_comp_block// View name: schematicsubckt navy_4x_diff_comp_block_schematic clk gnd in1 in2 ip1 ip2 nbias ncasc out out1 out1b outb pbias pcasc q qb vdd vinn vinp vrefn vrefp M72 (net0176 ip2 gnd gnd) n18 w=wnsum l=0.4 as=0.48*((wnsum) * (1))/(1) ad=0.48*((wnsum) * (1))/(1) ps=2*(((wnsum) * (1))+0.48)/(1) pd=2*(((wnsum) * (1))+0.48)/(1) m=(1)*(1) M71 (ip2 ncasc net0176 gnd) n18 w=wnsum l=0.4 as=0.48*((wnsum) * (1))/(1) ad=0.48*((wnsum) * (1))/(1) ps=2*(((wnsum) * (1))+0.48)/(1) pd=2*(((wnsum) * (1))+0.48)/(1) m=(1)*(1) M66 (net0178 ip1 gnd gnd) n18 w=wnsum l=0.4 as=0.48*((wnsum) * (1))/(1) ad=0.48*((wnsum) * (1))/(1) ps=2*(((wnsum) * (1))+0.48)/(1) pd=2*(((wnsum) * (1))+0.48)/(1) m=(1)*(1) M61 (ip1 ncasc net0178 gnd) n18 w=wnsum l=0.4 as=0.48*((wnsum) * (1))/(1) ad=0.48*((wnsum) * (1))/(1) ps=2*(((wnsum) * (1))+0.48)/(1) pd=2*(((wnsum) * (1))+0.48)/(1) m=(1)*(1) M98 (outb out gnd gnd) n18 w=4.0 l=0.2 as=1.92 ad=1.92 ps=8.96 pd=8.96 m=(1)*(1) M97 (out outb gnd gnd) n18 w=4.0 l=0.2 as=1.92 ad=1.92 ps=8.96 pd=8.96 m=(1)*(1) M100 (out1 qb gnd gnd) n18 w=4.0 l=0.2 as=1.92 ad=1.92 ps=8.96 pd=8.96 m=(1)*(1) M89 (net0150 nbias gnd gnd) n18 w=wncore l=0.4 as=0.48*((wncore) * (1))/(1) ad=0.48*((wncore) * (1))/(1) ps=2*(((wncore) * (1))+0.48)/(1) pd=2*(((wncore) * (1))+0.48)/(1) m=(1)*(1) M43 (net0163 ncasc net0152 gnd) n18 w=wncore l=0.4 as=0.48*((wncore) * (1))/(1) ad=0.48*((wncore) * (1))/(1) ps=2*(((wncore) * (1))+0.48)/(1) pd=2*(((wncore) * (1))+0.48)/(1) m=(1)*(1) M86 (out out1 gnd gnd) n18 w=4.0 l=0.2 as=1.92 ad=1.92 ps=8.96 pd=8.96 m=(1)*(1) M91 (in2 vrefp net0101 gnd) n18 w=wnin l=0.2 as=0.48*((wnin) * (1))/(1) ad=0.48*((wnin) * (1))/(1) ps=2*(((wnin) * (1))+0.48)/(1) pd=2*(((wnin) * (1))+0.48)/(1) m=(1)*(1) M38 (net0152 nbias gnd gnd) n18 w=wncore l=0.4 as=0.48*((wncore) * (1))/(1) ad=0.48*((wncore) * (1))/(1) ps=2*(((wncore) * (1))+0.48)/(1) pd=2*(((wncore) * (1))+0.48)/(1) m=(1)*(1)- M90 (net0101 ncasc net0150 gnd) n18 w=wncore l=0.4 as=0.48*((wncore) * (1))/(1) ad=0.48*((wncore) * (1))/(1) ps=2*(((wncore) * (1))+0.48)/(1) pd=2*(((wncore) * (1))+0.48)/(1) m=(1)*(1) M47 (in1 vrefn net0163 gnd) n18 w=wnin l=0.2 as=0.48*((wnin) * (1))/(1) ad=0.48*((wnin) * (1))/(1) ps=2*(((wnin) * (1))+0.48)/(1) pd=2*(((wnin) * (1))+0.48)/(1) m=(1)*(1) M96 (in1 vinp net0101 gnd) n18 w=wnin l=0.2 as=0.48*((wnin) * (1))/(1) ad=0.48*((wnin) * (1))/(1) ps=2*(((wnin) * (1))+0.48)/(1) pd=2*(((wnin) * (1))+0.48)/(1) m=(1)*(1) M35 (in2 vinn net0163 gnd) n18 w=wnin l=0.2 as=0.48*((wnin) * (1))/(1) ad=0.48*((wnin) * (1))/(1) ps=2*(((wnin) * (1))+0.48)/(1) pd=2*(((wnin) * (1))+0.48)/(1) m=(1)*(1) M75 (net098 net097 gnd gnd) n18 w=1.0 l=0.2 as=0.48 ad=0.48 ps=2.96 pd=2.96 m=(1)*(1) M80 (net0102 ip1 gnd gnd) n18 w=2.0 l=0.2 as=0.96 ad=0.96 ps=4.96 pd=4.96 m=(1)*(1) M73 (net0103 ip2 gnd gnd) n18 w=2.0 l=0.2 as=0.96 ad=0.96 ps=4.96 pd=4.96 m=(1)*(1) M81 (q clk net097 gnd) n18 w=1.0 l=0.2 as=0.48 ad=0.48 ps=2.96 pd=2.96 m=(1)*(1) M102 (out1b q gnd gnd) n18 w=4.0 l=0.2 as=1.92 ad=1.92 ps=8.96 pd=8.96 m=(1)*(1) M79 (net098 ncasc net0102 gnd) n18 w=2.0 l=0.2 as=0.96 ad=0.96 ps=4.96 pd=4.96 m=(1)*(1) M82 (qb clk net098 gnd) n18 w=1.0 l=0.2 as=0.48 ad=0.48 ps=2.96 pd=2.96 m=(1)*(1) M76 (net097 net098 gnd gnd) n18 w=1.0 l=0.2 as=0.48 ad=0.48 ps=2.96 pd=2.96 m=(1)*(1) M87 (outb out1b gnd gnd) n18 w=4.0 l=0.2 as=1.92 ad=1.92 ps=8.96 pd=8.96 m=(1)*(1) M74 (net097 ncasc net0103 gnd) n18 w=2.0 l=0.2 as=0.96 ad=0.96 ps=4.96 pd=4.96 m=(1)*(1) M70 (net0175 in2 vdd vdd) p18 w=wpsum l=0.4 as=0.48*((wpsum) * (1))/(1) ad=0.48*((wpsum) * (1))/(1) ps=2*(((wpsum) * (1))+0.48)/(1) pd=2*(((wpsum) * (1))+0.48)/(1) m=(1)*(1) M69 (ip2 pcasc net0175 vdd) p18 w=wpsum l=0.4 as=0.48*((wpsum) * (1))/(1) ad=0.48*((wpsum) * (1))/(1) ps=2*(((wpsum) * (1))+0.48)/(1) pd=2*(((wpsum) * (1))+0.48)/(1) m=(1)*(1) M68 (net0177 in2 vdd vdd) p18 w=wpsum l=0.4 as=0.48*((wpsum) * (1))/(1) ad=0.48*((wpsum) * (1))/(1) ps=2*(((wpsum) * (1))+0.48)/(1) pd=2*(((wpsum) * (1))+0.48)/(1) m=(1)*(1) M67 (in2 pcasc net0177 vdd) p18 w=wpsum l=0.4 as=0.48*((wpsum) * (1))/(1) ad=0.48*((wpsum) * (1))/(1) ps=2*(((wpsum) * (1))+0.48)/(1) pd=2*(((wpsum) * (1))+0.48)/(1) m=(1)*(1) M65 (ip1 pcasc net0179 vdd) p18 w=wpsum l=0.4 as=0.48*((wpsum) * (1))/(1) ad=0.48*((wpsum) * (1))/(1) ps=2*(((wpsum) * (1))+0.48)/(1) pd=2*(((wpsum) * (1))+0.48)/(1) m=(1)*(1) M64 (net0179 in1 vdd vdd) p18 w=wpsum l=0.4 as=0.48*((wpsum) * (1))/(1) ad=0.48*((wpsum) * (1))/(1) ps=2*(((wpsum) * (1))+0.48)/(1) pd=2*(((wpsum) * (1))+0.48)/(1) m=(1)*(1) M63 (net0180 in1 vdd vdd) p18 w=wpsum l=0.4 as=0.48*((wpsum) * (1))/(1) ad=0.48*((wpsum) * (1))/(1) ps=2*(((wpsum) * (1))+0.48)/(1) pd=2*(((wpsum) * (1))+0.48)/(1) m=(1)*(1) M62 (in1 pcasc net0180 vdd) p18 w=wpsum l=0.4 as=0.48*((wpsum) * (1))/(1) ad=0.48*((wpsum) * (1))/(1) ps=2*(((wpsum) * (1))+0.48)/(1) pd=2*(((wpsum) * (1))+0.48)/(1) m=(1)*(1) M99 (out1 qb vdd vdd) p18 w=0.5 l=0.2 as=0.24 ad=0.24 ps=1.96 pd=1.96 m=(1)*(1) M78 (qb q vdd vdd) p18 w=2.0 l=0.2 as=0.96 ad=0.96 ps=4.96 pd=4.96 m=(1)*(1) M85 (outb out vdd vdd) p18 w=8.0 l=0.2 as=3.84 ad=3.84 ps=16.96 pd=16.96 m=(1)*(1) M101 (out1b q vdd vdd) p18 w=0.5 l=0.2 as=0.24 ad=0.24 ps=1.96 pd=1.96 m=(1)*(1) M94 (ip1 vinp net0104 vdd) p18 w=wpin l=0.2 as=0.48*((wpin) * (1))/(1) ad=0.48*((wpin) * (1))/(1) ps=2*(((wpin) * (1))+0.48)/(1) pd=2*(((wpin) * (1))+0.48)/(1) m=(1)*(1) M13 (ip2 vinn net0162 vdd) p18 w=wpin l=0.2 as=0.48*((wpin) * (1))/(1) ad=0.48*((wpin) * (1))/(1) ps=2*(((wpin) * (1))+0.48)/(1) pd=2*(((wpin) * (1))+0.48)/(1) m=(1)*(1) M77 (q qb vdd vdd) p18 w=2.0 l=0.2 as=0.96 ad=0.96 ps=4.96 pd=4.96 m=(1)*(1) M20 (ip1 vrefn net0162 vdd) p18 w=wpin l=0.2 as=0.48*((wpin) * (1))/(1) ad=0.48*((wpin) * (1))/(1) ps=2*(((wpin) * (1))+0.48)/(1) pd=2*(((wpin) * (1))+0.48)/(1) m=(1)*(1) M95 (ip2 vrefp net0104 vdd) p18 w=wpin l=0.2 as=0.48*((wpin) * (1))/(1) ad=0.48*((wpin) * (1))/(1) ps=2*(((wpin) * (1))+0.48)/(1) pd=2*(((wpin) * (1))+0.48)/(1) m=(1)*(1) M15 (net0162 pcasc net0151 vdd) p18 w=wpcore l=0.4 as=0.48*((wpcore) * (1))/(1) ad=0.48*((wpcore) * (1))/(1) ps=2*(((wpcore) * (1))+0.48)/(1) pd=2*(((wpcore) * (1))+0.48)/(1) m=(1)*(1) M88 (out outb vdd vdd) p18 w=8.0 l=0.2 as=3.84 ad=3.84 ps=16.96 pd=16.96 m=(1)*(1) M92 (net0104 pcasc net0149 vdd) p18 w=wpcore l=0.4 as=0.48*((wpcore) * (1))/(1) ad=0.48*((wpcore) * (1))/(1) ps=2*(((wpcore) * (1))+0.48)/(1) pd=2*(((wpcore) * (1))+0.48)/(1) m=(1)*(1) M84 (qb clk vdd vdd) p18 w=2.0 l=0.2 as=0.96 ad=0.96 ps=4.96 pd=4.96 m=(1)*(1) M17 (net0151 pbias vdd vdd) p18 w=wpcore l=0.4 as=0.48*((wpcore) * (1))/(1) ad=0.48*((wpcore) * (1))/(1) ps=2*(((wpcore) * (1))+0.48)/(1) pd=2*(((wpcore) * (1))+0.48)/(1) m=(1)*(1) M83 (q clk vdd vdd) p18 w=2.0 l=0.2 as=0.96 ad=0.96 ps=4.96 pd=4.96 m=(1)*(1) M93 (net0149 pbias vdd vdd) p18 w=wpcore l=0.4 as=0.48*((wpcore) * (4))/(4) ad=0.48*((wpcore) * (4))/(4) ps=2*(((wpcore) * (4))+0.48)/(4) pd=2*(((wpcore) * (4))+0.48)/(4) m=(1)*(4)ends navy_4x_diff_comp_block_schematic// End of subcircuit definition.// Library name: navy// Cell name: 4x_diff_comp_block_test// View name: schematicI2 (clk gnd in1y in2y ip1y ip2y nbias ncasc outy out1y out1by outby pbias pcasc qy qby vdd vinn2 vinp2 vrefn2 vrefp2) navy_4x_diff_comp_block_schematicI1 (clk gnd in1x in2x ip1x ip2x nbias ncasc outx out1x out1bx outbx pbias pcasc qx qbx vdd vinn1 vinp1 vrefn1 vrefp1) navy_4x_diff_comp_block_schematicI0 (clk gnd in1 in2 ip1 ip2 nbias ncasc out out1 out1b outb pbias pcasc q qb vdd vinn vinp vrefn vrefp) navy_4x_diff_comp_block_schematicV16 (vrefp2 gnd) vsource dc=100.0m type=dcV15 (vrefn2 gnd) vsource dc=1.7 type=dc-V14 (vrefn1 gnd) vsource dc=1.5 type=dcV12 (vrefp1 gnd) vsource dc=500.0m type=dcV1 (vrefp gnd) vsource dc=900.0m type=dcV7 (vrefn gnd) vsource dc=900.0m type=dcV3 (nbias gnd) vsource dc=615.000m type=dcV6 (ncasc gnd) vsource dc=980.00m type=dcV9 (pcasc gnd) vsource dc=768.000m type=dcV4 (pbias gnd) vsource dc=1.114 type=dcV2 (vdd gnd) vsource dc=1.9V type=dcV8 (gnd 0) vsource dc=0 type=dcV5 (clk gnd) vsource type=pulse val0=1.8 val1=0 period=2.5n delay=1.7n rise=100.0p fall=100.0p width=1.15nV23 (vinn1 vrefn1) vsource type=pwl pwlperiod=82n wave=[ 0 50u 2.5n 50u 2.6n -50u 5n -50u 5.1n 50u 7.5n 50u 7.6n -50u 10n -50u 10.1n 50u 15n 50u 15.1n -50u 20n -50u 20.1n 50u 30n 50u 30.1n -50u 40n -50u 40.1n 50u 42.5n 50u 42.6n -50u 45n -50u 45.1n 50u 47.5n 50u 47.6n -50u 50n -50u 50.1n 50u 52.5n 50u 52.6n -50u 55n -50u 55.1n 50u 57.5n 50u 57.6n -50u 60n -50u ]V24 (vinn2 vrefn2) vsource type=pwl pwlperiod=82n wave=[ 0 50u 2.5n 50u 2.6n -50u 5n -50u 5.1n 50u 7.5n 50u 7.6n -50u 10n -50u 10.1n 50u 15n 50u 15.1n -50u 20n -50u 20.1n 50u 30n 50u 30.1n -50u 40n -50u 40.1n 50u 42.5n 50u 42.6n -50u 45n -50u 45.1n 50u 47.5n 50u 47.6n -50u 50n -50u 50.1n 50u 52.5n 50u 52.6n -50u 55n -50u 55.1n 50u 57.5n 50u 57.6n -50u 60n -50u ]V25 (vinp1 vrefp1) vsource type=pwl pwlperiod=82n wave=[ 0 -50u 2.5n -50u 2.6n 50u 5n 50u 5.1n -50u 7.5n -50u 7.6n 50u 10n 50u 10.1n -50u 15n -50u 15.1n 50u 20n 50u 20.1n -50u 30n -50u 30.1n 50u 40n 50u 40.1n -50u 42.5n -50u 42.6n 50u 45n 50u 45.1n -50u 47.5n -50u 47.6n 50u 50n 50u 50.1n -50u 52.5n -50u 52.6n 50u 55n 50u 55.1n -50u 57n -50u 57.1n 50u 60n 50u ]V26 (vinp2 vrefp2) vsource type=pwl pwlperiod=82n wave=[ 0 -50u 2.5n -50u 2.6n 50u 5n 50u 5.1n -50u 7.5n -50u 7.6n 50u 10n 50u 10.1n -50u 15n -50u 15.1n 50u 20n 50u 20.1n -50u 30n -50u 30.1n 50u 40n 50u 40.1n -50u 42.5n -50u 42.6n 50u 45n 50u 45.1n -50u 47.5n -50u 47.6n 50u 50n 50u 50.1n -50u 52.5n -50u 52.6n 50u 55n 50u 55.1n -50u 57n -50u 57.1n 50u 60n 50u ]V21 (vinp vrefp) vsource type=pwl pwlperiod=82n wave=[ 0 -50u 2.5n -50u 2.6n 50u 5n 50u 5.1n -50u 7.5n -50u 7.6n 50u 10n 50u 10.1n -50u 15n -50u 15.1n 50u 20n 50u 20.1n -50u 30n -50u 30.1n 50u 40n 50u 40.1n -50u 42.5n -50u 42.6n 50u 45n 50u 45.1n -50u 47.5n -50u 47.6n 50u 50n 50u 50.1n -50u 52.5n -50u 52.6n 50u 55n 50u 55.1n -50u 57n -50u 57.1n 50u 60n 50u ]V22 (vinn vrefn) vsource type=pwl pwlperiod=82n wave=[ 0 50u 2.5n 50u 2.6n -50u 5n -50u 5.1n 50u 7.5n 50u 7.6n -50u 10n -50u 10.1n 50u 15n 50u 15.1n -50u 20n -50u 20.1n 50u 30n 50u 30.1n -50u 40n -50u 40.1n 50u 42.5n 50u 42.6n -50u 45n -50u 45.1n 50u 47.5n 50u 47.6n -50u 50n -50u 50.1n 50u 52.5n 50u 52.6n -50u 55n -50u 55.1n 50u 57.5n 50u 57.6n -50u 60n -50u ]simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 tnom=27 scalem=1.0 scale=1e-06 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 digits=5 cols=80 pivrel=1e-3 sensfile=”../psf/sens.output” checklimitdest=both tran tran stop=60n errpreset=conservative write=”spectre.ic” writefinal=”spectre.fc” annotate=status maxiters=5 finalTimeOP info what=oppoint where=rawfilemodelParameter info what=models where=rawfileelement info what=inst where=rawfileoutputParameter info what=output where=rawfiledesignParamVals info what=parameters where=rawfileprimitives info what=primitives where=rawfilesubckts info what=subckts where=rawfilesaveOptions options save=allpub subcktprobelvl=2-
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